/*
 * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.h =============
 *  Configured MSPM0 DriverLib module declarations
 *
 *  DO NOT EDIT - This file is generated for the MSPM0G350X
 *  by the SysConfig tool.
 */
#ifndef ti_msp_dl_config_h
#define ti_msp_dl_config_h

#define CONFIG_MSPM0G350X
#define CONFIG_MSPM0G3505

#if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
#define SYSCONFIG_WEAK __attribute__((weak))
#elif defined(__IAR_SYSTEMS_ICC__)
#define SYSCONFIG_WEAK __weak
#elif defined(__GNUC__)
#define SYSCONFIG_WEAK __attribute__((weak))
#endif

#include <ti/devices/msp/msp.h>
#include <ti/driverlib/driverlib.h>
#include <ti/driverlib/m0p/dl_core.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform all required MSP DL initialization
 *
 *  This function should be called once at a point before any use of
 *  MSP DL.
 */


/* clang-format off */

#define POWER_STARTUP_DELAY                                                (16)


#define GPIO_HFXT_PORT                                                     GPIOA
#define GPIO_HFXIN_PIN                                             DL_GPIO_PIN_5
#define GPIO_HFXIN_IOMUX                                         (IOMUX_PINCM10)
#define GPIO_HFXOUT_PIN                                            DL_GPIO_PIN_6
#define GPIO_HFXOUT_IOMUX                                        (IOMUX_PINCM11)
#define CPUCLK_FREQ                                                     80000000



/* Defines for TIMEG_0 */
#define TIMEG_0_INST                                                     (TIMG0)
#define TIMEG_0_INST_IRQHandler                                 TIMG0_IRQHandler
#define TIMEG_0_INST_INT_IRQN                                   (TIMG0_INT_IRQn)
#define TIMEG_0_INST_LOAD_VALUE                                           (499U)



/* Defines for UART_0 */
#define UART_0_INST                                                        UART0
#define UART_0_INST_FREQUENCY                                            4000000
#define UART_0_INST_IRQHandler                                  UART0_IRQHandler
#define UART_0_INST_INT_IRQN                                      UART0_INT_IRQn
#define GPIO_UART_0_RX_PORT                                                GPIOA
#define GPIO_UART_0_TX_PORT                                                GPIOA
#define GPIO_UART_0_RX_PIN                                        DL_GPIO_PIN_31
#define GPIO_UART_0_TX_PIN                                        DL_GPIO_PIN_28
#define GPIO_UART_0_IOMUX_RX                                      (IOMUX_PINCM6)
#define GPIO_UART_0_IOMUX_TX                                      (IOMUX_PINCM3)
#define GPIO_UART_0_IOMUX_RX_FUNC                       IOMUX_PINCM6_PF_UART0_RX
#define GPIO_UART_0_IOMUX_TX_FUNC                       IOMUX_PINCM3_PF_UART0_TX
#define UART_0_BAUD_RATE                                                (115200)
#define UART_0_IBRD_4_MHZ_115200_BAUD                                        (2)
#define UART_0_FBRD_4_MHZ_115200_BAUD                                       (11)
/* Defines for UART_2 */
#define UART_2_INST                                                        UART2
#define UART_2_INST_FREQUENCY                                            4000000
#define UART_2_INST_IRQHandler                                  UART2_IRQHandler
#define UART_2_INST_INT_IRQN                                      UART2_INT_IRQn
#define GPIO_UART_2_RX_PORT                                                GPIOA
#define GPIO_UART_2_TX_PORT                                                GPIOA
#define GPIO_UART_2_RX_PIN                                        DL_GPIO_PIN_22
#define GPIO_UART_2_TX_PIN                                        DL_GPIO_PIN_21
#define GPIO_UART_2_IOMUX_RX                                     (IOMUX_PINCM47)
#define GPIO_UART_2_IOMUX_TX                                     (IOMUX_PINCM46)
#define GPIO_UART_2_IOMUX_RX_FUNC                      IOMUX_PINCM47_PF_UART2_RX
#define GPIO_UART_2_IOMUX_TX_FUNC                      IOMUX_PINCM46_PF_UART2_TX
#define UART_2_BAUD_RATE                                                (115200)
#define UART_2_IBRD_4_MHZ_115200_BAUD                                        (2)
#define UART_2_FBRD_4_MHZ_115200_BAUD                                       (11)




/* Defines for ICM_SPI */
#define ICM_SPI_INST                                                       SPI1
#define ICM_SPI_INST_IRQHandler                                 SPI1_IRQHandler
#define ICM_SPI_INST_INT_IRQN                                     SPI1_INT_IRQn
#define GPIO_ICM_SPI_PICO_PORT                                            GPIOB
#define GPIO_ICM_SPI_PICO_PIN                                     DL_GPIO_PIN_8
#define GPIO_ICM_SPI_IOMUX_PICO                                 (IOMUX_PINCM25)
#define GPIO_ICM_SPI_IOMUX_PICO_FUNC                 IOMUX_PINCM25_PF_SPI1_PICO
#define GPIO_ICM_SPI_POCI_PORT                                            GPIOB
#define GPIO_ICM_SPI_POCI_PIN                                     DL_GPIO_PIN_7
#define GPIO_ICM_SPI_IOMUX_POCI                                 (IOMUX_PINCM24)
#define GPIO_ICM_SPI_IOMUX_POCI_FUNC                 IOMUX_PINCM24_PF_SPI1_POCI
/* GPIO configuration for ICM_SPI */
#define GPIO_ICM_SPI_SCLK_PORT                                            GPIOB
#define GPIO_ICM_SPI_SCLK_PIN                                     DL_GPIO_PIN_9
#define GPIO_ICM_SPI_IOMUX_SCLK                                 (IOMUX_PINCM26)
#define GPIO_ICM_SPI_IOMUX_SCLK_FUNC                 IOMUX_PINCM26_PF_SPI1_SCLK
#define GPIO_ICM_SPI_CS0_PORT                                             GPIOA
#define GPIO_ICM_SPI_CS0_PIN                                      DL_GPIO_PIN_2
#define GPIO_ICM_SPI_IOMUX_CS0                                   (IOMUX_PINCM7)
#define GPIO_ICM_SPI_IOMUX_CS0_FUNC                    IOMUX_PINCM7_PF_SPI1_CS0



/* Defines for DMA_CH0 */
#define DMA_CH0_CHAN_ID                                                      (0)
#define UART_0_INST_DMA_TRIGGER                              (DMA_UART0_TX_TRIG)



/* Port definition for Pin Group GPIO_GRP_0 */
#define GPIO_GRP_0_PORT                                                  (GPIOA)

/* Defines for PIN_14: GPIOA.14 with pinCMx 36 on package pin 7 */
#define GPIO_GRP_0_PIN_14_PIN                                   (DL_GPIO_PIN_14)
#define GPIO_GRP_0_PIN_14_IOMUX                                  (IOMUX_PINCM36)
/* Port definition for Pin Group GPIO_GRP_15 */
#define GPIO_GRP_15_PORT                                                 (GPIOA)

/* Defines for PIN_15: GPIOA.15 with pinCMx 37 on package pin 8 */
// pins affected by this interrupt request:["PIN_15"]
#define GPIO_GRP_15_INT_IRQN                                    (GPIOA_INT_IRQn)
#define GPIO_GRP_15_INT_IIDX                    (DL_INTERRUPT_GROUP1_IIDX_GPIOA)
#define GPIO_GRP_15_PIN_15_IIDX                             (DL_GPIO_IIDX_DIO15)
#define GPIO_GRP_15_PIN_15_PIN                                  (DL_GPIO_PIN_15)
#define GPIO_GRP_15_PIN_15_IOMUX                                 (IOMUX_PINCM37)
/* Port definition for Pin Group OTHER */
#define OTHER_PORT                                                       (GPIOB)

/* Defines for ICM_CS: GPIOB.6 with pinCMx 23 on package pin 58 */
#define OTHER_ICM_CS_PIN                                         (DL_GPIO_PIN_6)
#define OTHER_ICM_CS_IOMUX                                       (IOMUX_PINCM23)
/* Port definition for Pin Group NCHD12_PORT */
#define NCHD12_PORT_PORT                                                 (GPIOA)

/* Defines for SCL: GPIOA.25 with pinCMx 55 on package pin 26 */
#define NCHD12_PORT_SCL_PIN                                     (DL_GPIO_PIN_25)
#define NCHD12_PORT_SCL_IOMUX                                    (IOMUX_PINCM55)
/* Defines for SDA: GPIOA.26 with pinCMx 59 on package pin 30 */
#define NCHD12_PORT_SDA_PIN                                     (DL_GPIO_PIN_26)
#define NCHD12_PORT_SDA_IOMUX                                    (IOMUX_PINCM59)



/* clang-format on */

void SYSCFG_DL_init(void);
void SYSCFG_DL_initPower(void);
void SYSCFG_DL_GPIO_init(void);
void SYSCFG_DL_SYSCTL_init(void);
void SYSCFG_DL_TIMEG_0_init(void);
void SYSCFG_DL_UART_0_init(void);
void SYSCFG_DL_UART_2_init(void);
void SYSCFG_DL_ICM_SPI_init(void);
void SYSCFG_DL_DMA_init(void);

void SYSCFG_DL_SYSTICK_init(void);

bool SYSCFG_DL_saveConfiguration(void);
bool SYSCFG_DL_restoreConfiguration(void);

#ifdef __cplusplus
}
#endif

#endif /* ti_msp_dl_config_h */
